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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>================================================================================ <o:p></o:p></span></p><pre style='word-wrap: break-word;white-space:pre-wrap'><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> CALL FOR PAPERS<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>================================================================================<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>The 6th IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA 2017)<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> August 16 - 18, 2017, Hsinchu, Taiwan<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Important Dates: <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> Paper submission: April 14, 2017 (11:59pm GMT-12) <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> Author notification: June 2, 2017<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> Final version: June 16, 2017<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Conference website: <a href="http://nvmsa2017.iis.sinica.edu.tw/">http://nvmsa2017.iis.sinica.edu.tw/</a><o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Information:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Non-Volatile memory (NVM) technologies have demonstrated great potential in <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>improving many aspects of present and future memory hierarchies, offering <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>high integration density, large capacity, zero standby power and good <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>resilience to soft errors. The recent research progress of various NVMs, <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>e.g., NAND flash, PCM, STT-RAM, RRAM, Racetrack, FeRAM, etc., have drawn <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>tremendous attentions from both academia and industry. Besides developing <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>robust and scalable devices, the unique characteristics of these NVM <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>technologies introduce plenty of opportunities and challenges for novel <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>circuit designs, architectures, system organizations, and management <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>strategies. There is an urgent need for technology invention, modeling, <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>analysis, design and application of these NVMs ranging from circuit design <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>level to system level. Non-Volatile Memory Systems and Applications <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Symposium (NVMSA) seeks both research and industry papers that describe <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>research or technical aspects related to NVMs. More information on <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>NVMSA 2017 can be found at <a href="http://nvmsa2017.iis.sinica.edu.tw/">http://nvmsa2017.iis.sinica.edu.tw/</a><o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Call for Papers: <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>NVMSA is a premier conference in the area of non-volatile memory systems and <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>emerging memory technologies. It provides a fantastic opportunity for global <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>nonvolatile memory researchers from different communities to discuss and <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>exchange knowledge, ideas and insights, and to facilitate the establishment<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>of potential collaborations that can speed up the progress in the design and <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>application of NVMs. An expanded technical program will be offered in NVMSA <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>2017 for the audience from academia and industry. The organizing committee is<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>soliciting various topics on related to NVMs including, but not limited to:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Device/Circuit Design of NVM Systems:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Emerging NVM Circuit Design<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM Device Design <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Error Correction for NVMs <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Non-volatile Logic Circuit<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Low Power NVM Circuit<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>NVM Architecture and Systems:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Non-volatile Registers<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Non-volatile Memory Architectures<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Non-volatile Cache Design<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM Neuromorphic Architectures<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVDIMM<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>NVM Storage:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Operating System Support for NVM<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - Compiler Optimization for NVM<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM-based Storage Software<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM-based Databases<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM Controller Design<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>NVM Applications:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - In-memory Computing<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM for Big Data Analytics<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM in Mobile Healthcare Applications<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM in Wearable Applications<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> - NVM in the Internet of Things<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Submission: <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Both research and industry track papers are solicited. All papers must be <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>submitted electronically in PDF format. The submitted manuscript must describe <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>original work not previously published and not concurrently submitted <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>lsewhere. Submissions should be no more than 6 pages in the IEEE conference <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>proceedings format (two-column, single-space, 9pt). Conference content will be<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>submitted for inclusion into IEEE Xplore, and will be EI indexed.<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Submission website: <a href="https://easychair.org/conferences/?conf=nvmsa2017">https://easychair.org/conferences/?conf=nvmsa2017</a><o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Special issues for selected papers:<o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Selected papers will be recommended to submit the extended versions to the <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>special issues of ACM Transactions on Storage (TOS) and ACM Journal of <o:p></o:p></span></pre><pre><span lang=DE style='font-size:12.0pt;font-family:"Times New Roman","serif"'>Emerging Technologies in Computing Systems (JETC).<o:p></o:p></span></pre></div></body></html>